TI-83 Plus Paging System ------------------------ By Michael Vincent - michael@radicalsoft.org ** INTRODUCTION The Z80 processor, using 16-bit addressing, only has a 64K address space. In order to access the 512K ROM and the 32K of RAM, swapping of pages is performed. Below is the layout of the 83+s address space: ----------------------| 0000h 16K ROM page 0 | (always) | ----------------------|3FFFh 4000h 16K RAM pages | 0-1 or ROM pages| 0-31 | -----------------------7FFFh 8000h 16K RAM pages | 0-1 or ROM pages| 0-31 | -----------------------BFFFh C000h 16K RAM page 0 | (always) | -----------------------FFFFh So 0000h-3FFFh is always ROM page 0, and C000h to FFFFh is always RAM page 0. For 4000h-7FFFh and 8000h-BFFFh, you can swap any RAM or ROM page in that you desire. Typically though, 8000h-BFFFh is RAM page 1, and a ROM page is swapped in 4000h-7FFFh. ** HOW TO SWAP PAGES IN 4000h-7FFFh AREA Port 6 controls this area. You output the page you wish to swap in. For ROM pages, bit 6 of the port is zero, and the lower four bits contain the page number. Example: (swap page $15 of flash into 4000h-7FFFh) ld a,%00010101 out (6),a For RAM pages, bit 6 of the port is nonzero, and the lower four bits contain the page number. Example: (swap page 1 of RAM into 4000h-7FFFh) ld a,%01000001 out (6),a ** HOW TO SWAP PAGES IN 8000h-BFFFh AREA Port 7 controls this area. You output the page you wish to swap in. For ROM pages, bit 6 of the port is zero, and the lower four bits contain the page number. Example: (swap page $15 of flash into 4000h-7FFFh) ld a,%00010101 out (7),a For RAM pages, bit 6 of the port is nonzero, and the lower four bits contain the page number. Example: (swap page 1 of RAM into 4000h-7FFFh) ld a,%01000001 out (7),a ** REMINDERS Remember that the TI-OS (and other ASM programs/applications) expect that 8000h-BFFFh contains RAM page 1. ROM calls such as vputs or puts won't work also (penrol and pencol are addresses in RAM) if you have another page there. ** SILVER EDITION NOTES The 83+ SE contains a 128K RAM chip, having 8 pages of memory. In v1.13 of the TI-OS, the extra 96K is not used. Future support for the additional 96K is planned by TI though. With the 128K chip, RAM pages 0-7 exist. 0-1 are the same as the normal 83+.